Computer Knowledge

Digital Logic and Microprocessors

749 Questions

Digital logic and microprocessors form the core of computer science, covering logic gates, combinational and sequential circuits, and CPU architecture. These topics are crucial for computer knowledge sections in technical exams. Test your digital electronics basics here.

Logic gates and circuitsCombinational vs sequential circuitsMicroprocessor instructionsTruth tables and boolean functions

Digital Logic and Microprocessors Questions

Multiple choice

Which of the following flags is set to a 1 by the instruction just ending if a carry occurred from 4th bit i.e 0, 1, 2 and 3rd bit of the A register during the instruction's execution in 8085 processor?

  1. Carry Flag

  2. Zero Flag

  3. Auxiliary Carry Flag

  4. Sign Flag

  5. Clock
Reveal answer Fill a bubble to check yourself
C Correct answer
Explanation

This flag is set to a 1 by the instruction just ending if a carry occurred from  4th bit i.e 0, 1, 2, 3rd bit of the A register during the instruction's execution in 8085 processor.

Multiple choice

JK master-slave flip-flop resolves the race problem using two flip-flops. These flip-flops are connected in which of the following patterns?

  1. Cascaded to each other and clock is applied to master flip-flop

  2. Cascaded to each other, but the clock is applied to both master and slave simultaneously

  3. Cascaded to each other and the outputs of master flip-flop are cross-coupled to inputs of slave

  4. Crossed-coupled to each other

  5. None of these
Reveal answer Fill a bubble to check yourself
B Correct answer
Explanation

In JK flip-flop, the clock is applied to both flip-flops. The master-slave action is controlled by the Q output of master. The answer is correct.

Multiple choice

If the timer 8254 is used in a microprocessor, then the counters always count down. To accomplish this, the counters contain which of the following registers?

  1. Serial-in and serial-out

  2. Parallel-in and parallel-out

  3. Parallel-in and serial-out

  4. Serial-in and parallel-out

  5. Clock in at parallel-out and no clock at clock input
Reveal answer Fill a bubble to check yourself
B Correct answer
Explanation

In 8254, one has to provide the initial value in binary form. This value will provide the required delay. At start, this binary value is loaded to the counter. This is done using parallel-in concept of the shift register. The counter counts down and provides the value to 8254 for comparison with zero. For this, a parallel output stream is used. So, the concept of shift registers is parallel-in and parallel-out.

Multiple choice

A two-input XOR gate can also be used as

  1. OR gate

  2. Full adder logic chip

  3. Half adder logic chip

  4. NOR-AND gate

  5. NAND gate
Reveal answer Fill a bubble to check yourself
C Correct answer
Explanation

The truth table of SUM output of half adder is the same as XOR truth table. So, XOR can be used as a half adder.

Multiple choice

One can convert an SR flip-flop into a D flip-flop when

  1. SR terminals are shorted to each other

  2. both inputs of the SR are kept open and a clock is applied

  3. a NOT gate is connected between the SR inputs

  4. S is made 0 and R is made 0

  5. D flip-flop cannot be made by SR flip-flop.
Reveal answer Fill a bubble to check yourself
C Correct answer
Explanation

When NOT is connected in between S and R, and S = 1, then R = 0. An applied clock provides output as Q = 1, so D is 1 and Q is also 1. It is the D condition. When S = 0, then R = 1 and the output is Q = 0. This is also the D condition. Other conditions cannot appear. Hence, this configuration will make SR flip-flop a D flip-flop.

Multiple choice

While calculating a division, the microprocessor 8085 uses which of the following?

  1. Hardware divider chip, if available; otherwise, by using successive subtraction in an adder chip of its ALU

  2. Hardware divider chip, if available; otherwise, by using successive subtraction in a subtractor chip of its ALU

  3. Shift and subtract algorithm

  4. Shift and add algorithm

  5. Shift and shift algorithm
Reveal answer Fill a bubble to check yourself
A Correct answer
Explanation

If the hardware chip is available, the processor will use it for division. If it is not available, then successive subtraction is used and the hardware used by the CPU is adder (using 2's complement representation).

Multiple choice

In asynchronous counter, the total propagation delay is n * tpd, while in synchronous counter, it is tpd. Why?

  1. The propagation delay occurs due to late arrival of the clock in the flip-flop and its own delay.

  2. Total propagation delay is tpd only.

  3. No propagation delay since the clock is available at the same time to all the flip-flops.

  4. Propagation delay is tpd + (n - 1).

  5. Propagation delay does not depend on the clock.
Reveal answer Fill a bubble to check yourself
A Correct answer
Explanation

Propagation delay is the time required by one flip-flop to respond and produce output, and is given as tpd. In asynchronous counter, the clock is provided only at the first flip-flop. Other flip-flop gets the clock from the Q output of the previous flip-flop. So, time required when the last flip-flop will get the clock is number of flip-flops * response delay of one flip-flop. This total time delay is called propagation delay of the counter. In synchronous counter, all flip-flops get the clock simultaneously.

Multiple choice

Which of the following is not a part of combinational circuit?

  1. Output capacity

  2. Input capacity

  3. Storage capacity

  4. Capacity to drive more than one output

  5. Capacity to have controlled outputs
Reveal answer Fill a bubble to check yourself
C Correct answer
Explanation

Combinational circuits provide output according to current inputs. It does not save or store its output. So, storage capacity is not a part of combinational circuit.

Multiple choice

Which error detection method uses one's complement arithmetic?

  1. Simply parity check

  2. Checksum

  3. Two-dimensional parity check

  4. CRC

  5. None of these
Reveal answer Fill a bubble to check yourself
B Correct answer
Explanation

Checksums use one's complement arithmetic to detect errors in data transmission. Data is divided into words, summed using one's complement arithmetic, and the complement is sent as the checksum. The receiver performs the same calculation - a non-zero result indicates an error. Parity checks are simpler, CRC is more robust, and 2D parity adds extra dimensions but none use one's complement like checksums.