When NOT is connected in between S and R, and S = 1, then R = 0. An applied clock provides output as Q = 1, so D is 1 and Q is also 1. It is the D condition. When S = 0, then R = 1 and the output is Q = 0. This is also the D condition. Other conditions cannot appear. Hence, this configuration will make SR flip-flop a D flip-flop.