Multiple choice

Consider the following data path of a CPU

The, ALU, the bus and all the registers in the data path are of identical size. All operations including incrementation of the PC and the GPRs are to be carried out in the ALU. Two clock cycles are needed for memory read operation-the first one for loading data from the memory but into the MDR.

The instruction “add R0,R1” has the register transfer in terpretation R0 <= R0 + R1. The minimum number of clock cycles needed for execution cycle of this instruction is

  1. 2

  2. 3

  3. 4

  4. 5
Reveal answer Fill a bubble to check yourself
D Correct answer
Explanation

R0 $\leftarrow$ R0+ R1 First cycle require to fetch operands two cycles required for this. The next cycle required to use ALU to perform ADD operation. So total cycles required = 3

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