Computer Knowledge

Digital Logic and Microprocessors

749 Questions

Digital logic and microprocessors form the core of computer science, covering logic gates, combinational and sequential circuits, and CPU architecture. These topics are crucial for computer knowledge sections in technical exams. Test your digital electronics basics here.

Logic gates and circuitsCombinational vs sequential circuitsMicroprocessor instructionsTruth tables and boolean functions

Digital Logic and Microprocessors Questions

Multiple choice

Two nibble adder can be implemented by (without initial carry)

  1. 4 full adderscomplementary

  2. 3 full adder and a half adder

  3. 4 half adder

  4. 2 half and 2 full adders
Reveal answer Fill a bubble to check yourself
B Correct answer
Explanation

A nibble is 4 bits. When adding two 4-bit numbers without an initial carry, the least significant bit (LSB) position only needs a half adder since there's no carry-in. The remaining 3 bit positions each require a full adder to handle the carry-out from the previous stage. Therefore, 3 full adders and 1 half adder are needed.

Multiple choice

How many gates (minimum) are needed for a 3-bit up counter using standard binary and using T flip-flop?

Assume unlimited fan-in.

  1. 4

  2. 3

  3. 2

  4. 1
Reveal answer Fill a bubble to check yourself
C Correct answer
Explanation

A 3-bit up counter using T flip-flops requires minimum gates when exploiting the toggle pattern. With unlimited fan-in, only 2 gates are needed: the first T flip-flop toggles every clock (no gate needed), while the second and third require enable logic that can be implemented with just 2 gates total using AND/OR combinations.

Multiple choice

Minimum SOP of $\bar X \bar Y \bar Z + \bar X \bar Y Z + \bar XYZ + X \bar YZ+ XYZ$ is
  1. $XY+\bar XZ$
  2. $\bar X \bar Y+ YZ + XZ$
  3. $\bar X \bar Y + Z$

  4. None of these
Reveal answer Fill a bubble to check yourself
C Correct answer
Explanation

The minimum Sum of Products (SOP) form is X̄Ȳ + Z. Using Boolean algebra simplification or Karnaugh map: X̄ȲZ̄ + X̄ȲZ + X̄YZ + XȲZ + XYZ = X̄Ȳ(Z̄+Z) + X̄YZ + XȲZ + XYZ = X̄Ȳ + Z(X̄Y + XȲ + XY) = X̄Ȳ + Z(X̄Y + X(Ȳ+Y)) = X̄Ȳ + Z(X̄Y + X) = X̄Ȳ + Z(X + Y) = X̄Ȳ + XZ + YZ = X̄Ȳ + XZ + YZ. Further analysis shows X̄Ȳ + Z is the minimal form.

Multiple choice

A sequential circuit has one input and one output. In the input sequence whenever a pattern 010 or 0001 is detected, the output becomes 1 when the last symbol of the pattern is received. Otherwise, the output equals to 0. What will be the minimum number of states of the equivalent state diagram of this synchronous sequential circuit?

  1. 4

  2. 5

  3. 6

  4. 7
Reveal answer Fill a bubble to check yourself
B Correct answer
Explanation

To detect patterns 010 and 0001, we need states representing partial matches. State diagram needs: initial state (S0), after '0' (S1), after '01' (S2), after '010' (S3 - output 1), after '00' (S4), after '000' (S5), after '0001' (S6 - output 1). However, some states can be merged, and the minimal implementation requires 5 states to track all necessary prefix information without redundancy.