Multiple choice

For the circuit shown in the following, I0 - I3 are inputs to the 4 : 1 multiplexers, R (MSB) and S are control bits. The output Z can be represented by

  1. PQ + P$\bar Q$S + $\overline{QRS}$
  2. P$\bar Q$ + PQ$\bar R$+ $\overline{PQS}$
  3. P$\overline{QR}$+ $\bar P$QR + PARS + $\overline{QRS}$
  4. PQ$\bar R$+ PQR$\bar S$+ P$\overline{QR}$S + $\overline{QRS}$
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Explanation

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