Test 4 - Digital Circuits | Electronics and Communication (ECE)
Topic wise test for Digital Circuits of Electronics and Communication (ECE)
Questions
The following binary values were applied to the X and Y inputs of the NAND latch shown in the figure in the sequence indicated below:
X = 0, Y = 1; X = 0, Y = 0; X = 1, Y = 1.
The corresponding stable P, Q outputs will be

- P = 1, Q = 0; P = 1, Q = 0; P = 1, Q = 0 or P = 0, Q = 1
- P = 1, Q = 0; P = 0, Q = 1; or P = 0, Q = 1; P = 0, Q = 1
- P = 1, Q = 0; P = 1, Q = 1; P = 1, Q = 0 or P = 0, Q = 1
- P = 1, Q = 0; P = 1, Q = 1; P = 1, Q = 1
For the circuit shown below, the counter state (Q1, Q0) follows the sequence

- 00, 01, 10, 11, 00 …
- 00, 01, 10, 00, 01 …
- 00, 01, 11, 00, 01 …
- 00, 10, 11, 00, 10 …
Figure shows a ripple counter using positive edge triggered flip-flops. If the present state of counter is Q2Q1Q0 = 011, then its next state (Q2Q1Q0) will be

- 010
- 100
- 111
- 101
In the modulo-6 ripple counter shown in the figure below, the output of the 2- input gate is used to clear the J-K flip-flop. The 2-input gate is
- a NAND gate
- a NOR gate
- an OR gate
- an AND gate
The Boolean expression AC + $B\bar C$ is equivalent to
- $\bar AC + B\bar C + AC$
- $\bar BC + AC + B\bar C+\bar A C \bar B$
- $AC+B\bar C + \bar B C + ABC$
- $ABC + \bar A B \bar C + AB \bar C + A \bar B C$
A 4-bit D/A converter is connected to a free-running 3-bit UP counter, as shown in the following figure. Which of the following waveforms will be observed at V0?

If the functions W, X, Y and Z are as follows:
W = R + $\bar P Q + \bar RS$
X = PQ$\bar R \bar S + \bar P \bar Q \bar R \bar S + P \bar Q \bar R \bar S$
Y = RS + $\overline{PR + P \bar Q + \bar P \bar Q}$
Z = R + S + $\overline{PQ + \bar P \bar Q \bar R + P \bar Q \bar S}$
then
- W = Z, X = $\mathcal{Z}$
- W = Z, X = Y
- W = Y
- W = Y = $\mathcal{Z}$
A 0 to 6 counter consists of 3 flip flops and a combination circuit of 2 input gate(s). The combination circuit consists of
- one AND gate
- one OR gate
- one AND gate and one OR gate
- two AND gates
For the circuit shown in figure below, two 4-bit parallel-in serial-out shift registers loaded with the data shown are used to feed the data to a full-adder. Initially, all the flip-flops are in clear state. After applying two clock pulses, what will be the outputs of the full-adder?

- S = 0, C0 = 0
- S = 0, C0 = 1
- S = 1, C0 = 0
- S = 1, C0 = 1
Two D-flip-flops, as shown below, are to be connected as a synchronous counter that goes through the following Q1 Q0 sequence
00 $\rightarrow$ 01 $\rightarrow$ 11 $\rightarrow$ 10 $\rightarrow$ 00 $\rightarrow$.........
The inputs D0 and D1 respectively should be connected as

- $\bar Q_1$ and Q0
- $\bar Q_0$ and Q1
- $\bar Q_1$$\bar Q_0$ and $\bar Q_1$ Q0
- $\bar Q_1$$\bar Q_0$ and Q0 Q1
The DTL, TTL, ECL and CMOS families of digital ICs are compared in the following 4 columns:
| (P) | (Q) | (R) | (S) | |
| Fanout is minimum | DTL | DTL | TTL | CMOS |
| Power consumption is minimum | TTL | CMOS | ECL | DTL |
| Propagation delay is minimum | CMOS | ECL | TTL | TTL |
- P
- Q
- R
- S
For the circuit shown in the following, I0 - I3 are inputs to the 4 : 1 multiplexers, R (MSB) and S are control bits.
The output Z can be represented by

- PQ + P$\bar Q$S + $\overline{QRS}$
- P$\bar Q$ + PQ$\bar R$+ $\overline{PQS}$
- P$\overline{QR}$+ $\bar P$QR + PARS + $\overline{QRS}$
- PQ$\bar R$+ PQR$\bar S$+ P$\overline{QR}$S + $\overline{QRS}$
It is desired to multiply the numbers 0AH by 0BH and store the result in the accumulator. The numbers are available in registers B and C respectively. A part of the 8085 program for this purpose is given below :
MVI A, 00H
LOOP ------
HLT
END
The sequence of instructions to complete the program would be
- JNX LOOP, ADD B, DCR C
- ADD B, JNZ LOOP, DCR C
- DCR C, JNZ LOOP, ADD B
- ADD B, DCR C, JNZ LOOP
Which of the following Boolean Expressions correctly represents the relation between P, Q, R and M1?

- M1 = (P OR Q) XOR R
- M1 = (P AND Q) X OR R
- M1 = (P NOR Q) X OR R
- M1 = (P XOR Q) XOR R
In the following circuit, X is given by

- X = $A\bar B \bar C+ \bar A B \bar C + \bar A \bar B C + ABC$
- X = $\bar A BC + A\bar B C + AB\bar C + \bar A \bar B \bar C$
- X = $AB + BC+ AC$
- X = $\bar A \bar B + \bar B \bar C + \bar B \bar C + \bar A \bar C$









