aliensbrain
  • Home
  • Study
  • Quizzes
  • 🎤AI Practicefree
  • Notebooks
  • Community
  • Sign in
  • Test 4 - Digital Circuits | Electronics and Communication (ECE)
  • In the modulo-6 ripple counter shown in the figure below,...
Multiple choice

In the modulo-6 ripple counter shown in the figure below, the output of the 2- input gate is used to clear the J-K flip-flop. The 2-input gate is

  1. a NAND gate

  2. a NOR gate

  3. an OR gate

  4. an AND gate

Reveal answer Fill a bubble to check yourself
C Correct answer
Explanation

 

Keep practicing — related questions

  • The circuit shown below consists of JK flip-flops, each with an active low asynchronous reset ($\bar{R}_d$ ...
  • Figure shows a ripple counter using positive edge triggered flip-flops. If the present state of counter is ...
  • For the circuit shown in figure below, two 4-bit parallel-in serial-out shift registers loaded with the dat...
  • A 0 to 6 counter consists of 3 flip flops and a combination circuit of 2 input gate(s). The combination cir...
  • The present output Qn of an edge triggered JK flip-flop is logic 0. If J = 1, then Qn + 1
  • Consider the circuit in the diagram. The $\oplus$ operator represents Ex - OR. The D flip - flops are initi...
  • B1, B2, and B6 all help the body ?
  • Match the Nutrition Req: A 2 year old Hunting dog used regularly
Play the full quiz 🎤 Practise this topic out loud

Practice this topic

  • Digital Logic and Microprocessors (749 questions)

More quizzes with this question

  • Test 4 - Digital Circuits | Electronics and Communication (ECE)
  • 2004|Electronics and Comm (GATE Exam)-Previous Question Paper Solution
Advertisement
© Aliensbrain | all rights reserved
  • About
  • Contact
  • Terms and Condition
  • Privacy Policy