Semiconductors and Diodes

The transistors used in a portion of the TTL gate shown in figure have ^_$\beta$ = 100 ,the base-emitter voltage is 0.7 V for a transistor in active region and 0.75 V for a transistor in saturation. If the sink current I = 1 mA and the output is at logic 0, then the current I_R will be equal to

In the three dimensional view of a silicon n - channel MOS transistor shown below, $\delta$= 20 nm. The transistor is of width 1 $\mu$m. The depletion width formed at every p - n junction is 10 nm. The relative permittivities of Si and SiO₂, respectively, are 11.7 and 3.9, and $\epsilon_0$= 8.9 x 10^-12 F/m. The gate-source overlap capacitance is approximately

In the three dimensional view of a silicon n - channel MOS transistor shown below, $\delta$= 20 nm. The transistor is of width 1 $\mu$m. The depletion width formed at every p - n junction is 10 nm. The relative permittivities of Si and SiO₂, respectively, are 11.7 and 3.9, and $\epsilon_0$= 8.9 x 10^-12 F/m. The source - body junction capacitance is approximately

A heavily doped n − type semiconductor has the following data: Hole-electron mobility ratio: 0.4 Doping concentration: 84.2 ×10 atoms/m³ Intrinsic concentration: 41.5 ×10 atoms/m³ The ratio of conductance of the n − type semiconductor to that of the intrinsic semiconductor of same material and at the same temperature is given by