Multiple choice

Consider the following circuit composed of XOR gates and non-inverting buffers

enter image description here

The non-inverting buffers have delays d1 = 2 ns and d2 = 4 ns as shown in the figure. Both XOR gates and all wires have zero delay. Assume that all gate inputs, outputs and wires are stable at logic level 0 at time

  1. If the following waveform is applied at input A, how many transition(s) (change of logic levels) Occur (s) at B during the interval from 0 to 10 ns?

enter image description here

  1. 1

  2. 2

  3. 3

  4. 4
Reveal answer Fill a bubble to check yourself
C Correct answer
Explanation

Due to delays s1= 2 & s2=4 the transistions would occur at time1, 2 & 4.

Time Input (A) Output (B)
0 1 0
I 1 1 0 Transition
II 2 1 0 Transition
III 4 0 1 Transition

So total 3 transistions

Keep practicing — related questions