what is associative law over OR gate?
a.(b.c) =(a.b).c
a.b.c=b.c.a
a.b=b.c
a.c=c.a
(p.q)'=? it ia a law
0
p'.q'
p.q
p'+q'
1+p'+q.r+p.(r+q')=?
1
p+q
p+r
what is sequential circuit contains?
combitional circuit and memory elements
only combinational circuit with clock
gate and clock pluse
any of these
The NAND gate is equivalent to?
bubbled AND
bubbled OR
bubbled XOR
NONE OF THESE
what is DeMorgan's law?
(p.q)'=p'+q'
(p+q)'=p'.q'
both
none of the above
Which of the following is not functionaly complete set?
AND , OR
NAND
NOR
OR,AND,NOT
Karnaugh map (K-map) is used to?
minimize the number of flip flop in a digital circuit
minimize the number of gates only in digital circuit
minimize the number of gates and fan in of a digital circuit
design gates
Time required for a gate or inverter to change its state is defined as?
rise time
decay time
charging time
propagation time
is combinational circuit having memory element?
True
False