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2003|Electronics and Comm (GATE Exam)-Previous Question Paper Solution

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Multiple Choice

A 4 bit ripple counter and a 4 bit synchronous counter are made using flip-flops having a propagation delay of 10 ns each. If the worst case delay in the ripple counter and the synchronous counter be R and S respectively, then

  1. R = 10 ns, S = 40 ns
  2. R = 40 ns, S = 10 ns
  3. R = 10 ns, S = 30 ns
  4. R = 30 ns, S = 10 ns
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