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Test 4 - Digital Circuits | Electronics and Communication (ECE)
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The following binary values were applied to the X and Y inputs of the NAND latch shown in the figure in the sequence indicated below:
X = 0, Y = 1; X = 0, Y = 0; X = 1, Y = 1.
The corresponding stable P, Q outputs will be
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A
P = 1, Q = 0; P = 1, Q = 1; P = 1, Q = 0 or P = 0, Q = 1
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