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Test 2 - Digital Circuits | Electronics and Communication (ECE)

Topic wise test for Digital Circuits of Electronics and Communication (ECE)

25 Questions Published
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Questions

Question 1 Multiple Choice (Single Answer)

Choose the correct one from among the alternatives A, B, C, D, after matching an item from Group 1 most appropriate item in Group 2.
Group 1 Group 2
P. Shift register 1. Frequency division
Q. Counter 2. Addressing in memory chips
R. Decoder 3. Serial to parallel data conversion

  1. P - 3, Q - 2, R - 1
  2. P - 3, Q - 1, R - 2
  3. P - 2, Q - 1, R - 3
  4. P - 1, Q - 2, R - 2
Question 2 Multiple Choice (Single Answer)

Match the logic gates in Column A with their equivalents in Column B.

  1. P-2, Q-4, R-1, S-3
  2. P-4, Q-2, R-1, S-3
  3. P-2, Q-4, R-3, S-1
  4. P-4, Q-2, R-3, S-1
Question 3 Multiple Choice (Single Answer)

The minimum number of comparators required to build an 8 it flash ADC is

  1. 8
  2. 63
  3. 255
  4. 256
Question 4 Multiple Choice (Single Answer)

A master - slave flip flop has the characteristic that

  1. change in the output immediately reflects in the output
  2. change in the output occurs when the state of the master is affected
  3. change in the output occurs when the state of the slave is affected
  4. both the master and the slave states are affected at the same time
Question 5 Multiple Choice (Single Answer)

For the 8085 assembly language program given below, the content of the accumulator after the execution of the program is

  1. 00H
  2. 45H
  3. 67H
  4. E7H
Question 6 Multiple Choice (Single Answer)

What are the counting states (Q1 Q 2) for the counter shown in the figure below?

  1. 11 10 00 11 10....
  2. 01 10 11 00 01...
  3. 00 11 01 10 00...
  4. 01 10 00 01......
Question 7 Multiple Choice (Single Answer)

The out put Y of a 2 - bit comparator is logic 1 whenever the 2 - bit input A is greater than the 2 - bit input B. The number of combinations for which the output is logic 1, is

  1. 4
  2. 6
  3. 8
  4. 10
Question 8 Multiple Choice (Single Answer)

In the following circuit, the comparators output is logic “1” if V1 > V2 and is logic “0” otherwise. The D / A conversion is done as per the relation VDAC = $\sum_{n=0}^3 2^{n-1}b_n$ Volts, where b3
(MSB), b1, b2 and b0 (LSB) are the counter outputs. The counter starts from the clear state.

The stable reading of the LED displays is

  1. 06
  2. 07
  3. 12
  4. 13
Question 9 Multiple Choice (Single Answer)

The present output Qn of an edge triggered JK flip-flop is logic 0. If J = 1, then Qn + 1

  1. cannot be determined
  2. will be logic 0
  3. will be logic 1
  4. will race around
Question 10 Multiple Choice (Single Answer)

In the following circuit, the comparators output is logic “1” if V1 > V2 and is logic “0” otherwise. The D / A conversion is done as per the relation VDAC = $\sum_{n=0}^3 2^{n-1}b_n$ Volts, where b3 (MSB), b1, b2 and b0 (LSB) are the counter outputs. The counter starts from the clear state.

The magnitude of the error between VDAC and Vin at steady state (in volts) is

  1. 0.2
  2. 0.3
  3. 0.5
  4. 1.0
Question 11 Multiple Choice (Single Answer)

The 8255 Programmable Peripheral Interface is used as described below.
(i) An/A D converter is interface to a microprocessor through an 8255.
The conversion is initiated by a signal from the 8255 on Port C. A signal on Port C causes data to be stobed into Port A.
(ii) Two computers exchange data using a pair of 8255s. Port A works as a bidirectional data port supported by appropriate handshaking signals.
What will be the appropriate modes of operation of 8255 Interface for (i) and (ii)?

  1. Mode 0 for (i) and Mode 1 for (ii)
  2. Mode 1 for (i) and Mode 2 for (ii)
  3. Mode for (i) and Mode 0 for (ii)
  4. Mode 2 for (i) and Mode 1 for (ii)
Question 12 Multiple Choice (Single Answer)

The output of a 3-stage Johnson (twisted ring) counter is fed to a digital-to analog (D/A) converter as shown in the figure below. Assume all the states of the counter to be unset initially. The waveform which represents the D/A converter output Vo is

Question 13 Multiple Choice (Single Answer)

The circuit diagram of a standard TTL NOT gate is shown in the figure. When Vi = 2.5 V, the modes of operation of the transistors will be

  1. Q1 : reverse active; Q2 : normal active; Q3 : saturation; Q4 : cut-off
  2. Q1 : reverse active; Q2 : saturation; Q3 : saturation; Q4 : cut-off
  3. Q1 : normal active; Q2 : cut-off; Q3 : cut-off; Q4 : saturation
  4. Q1 : saturation; Q2 : saturation;Q3 : saturation; Q4 : normal active
Question 14 Multiple Choice (Single Answer)

Two 5-bit binary numbers, i.e. X = 01110 and Y = 11001 are represented in two’s complement format. The sum of X and Y represented in two’s complement format using 6 bits is

  1. 100111
  2. 001000
  3. 000111
  4. 101001
Question 15 Multiple Choice (Single Answer)

The boolean expression Y = $\bar A \bar B \bar C D + \bar ABC\bar D + A\bar B \bar C D + AB\bar C \bar D$ can be minimized to

  1. Y = $\bar A \bar B \bar C D + \bar A B \bar C + A \bar C D$
  2. Y = $\bar A \bar B \bar C D + BC \bar D + A \bar B \bar C D$
  3. Y = $\bar A BC \bar D + \bar B \bar C D + A\bar B \bar C D$
  4. Y = $\bar A BC \bar D + \bar B \bar C D + AB \bar C \bar D$
Question 16 Multiple Choice (Single Answer)

The logic function implemented by the following circuit at the terminal OUT is

  1. P NOR Q
  2. P NAND Q
  3. P OR Q
  4. P AND Q
Question 17 Multiple Choice (Single Answer)

The circuit shown in figure converts

  1. BCD to binary code
  2. Binary to excess - 3 code
  3. Excess - 3 to Gray code
  4. Gray to Binary code
Question 18 Multiple Choice (Single Answer)

Following is the segment of a 8085 assembly language program:
LXI SP, EFFF H
CALL 3000 H
:
:
3000 H : LXI H, 3CF4 H
PUSH PSW
SPHL
POP PSW
RET
On completion of RET execution, the contents of SP is

  1. 3CFO H
  2. 3CF8 H
  3. 3FFD H
  4. EFFF H
Question 19 Multiple Choice (Single Answer)

Consider an 8085 microprocessor system.
The following program starts at location 0100H.
LXI SP, 00FF
LXI H, 0701
MVI A, 20H
SUB M

The content of accumulator when the program counter reaches 0109H is

  1. 20H
  2. 02H
  3. 00H
  4. FFH
Question 20 Multiple Choice (Single Answer)

11001, 1001, 111001 correspond to the 2`s complement representation of which one of the following sets of numbers?

  1. 25,9, and 57 respectively
  2. -6, -6, and -6 respectively
  3. -7, -7 and -7 respectively
  4. -25, -9 and -57 respectively
Question 21 Multiple Choice (Single Answer)

The full form of the abbreviations TTL and CMOS in reference to logic families are

  1. Triple Transistor Logic and Chip Metal Oxide Semiconductor
  2. Tristate Transistor Logic and Chip Metal Oxide Semiconductor
  3. Transistor Transistor Logic and Complementary Metal Oxide Semiconductor
  4. Tristate Transistor Logic and Complementary Metal Oxide Silicon
Question 22 Multiple Choice (Single Answer)

Consider an 8085 microprocessor system.
If in addition following code exists from 0109H onwards.
ORI 40H
ADD M
What will be the result in the accumulator after the last instruction is executed?

  1. 40H
  2. 20H
  3. 60H
  4. 42H
Question 23 Multiple Choice (Single Answer)

The output Y in the circuit below is always '1' when

  1. two or more of the inputs P,Q,R are '0'
  2. two or more of the inputs P,Q,R are '1'
  3. any odd number of the inputs P,Q,R is '0'
  4. any odd number of the inputs P,Q,R is '1'
Question 24 Multiple Choice (Single Answer)

Decimal 43 in Hexadecimal and BCD number system is respectively

  1. B2, 0100 0011
  2. 2B, 0100 0011
  3. 2B, 0011 0100
  4. B2, 0100 0100
Question 25 Multiple Choice (Single Answer)

The number of product terms in the minimized sum-of-product expression obtained through the following K-map is (where “d” denotes don't care states)

  1. 2
  2. 3
  3. 4
  4. 5
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