Online Test 4 - Digital Logic and Circuit Design
GATE Online practice test Digital Logic and Circuit Design
Questions
Let A = 1111110 and B = 0000 1010 be two 8 - bit 2's complement numbers. Their product in 2's complement is
- 1100 0100
- 1001 1100
- 1010 0101
- 1101 0101
Consider the partial implementation of a 2 - bit counter using T flip flops following the sequence 0 - 2- 3 - 1 - 0, as shown below:
To complete the circuit, input X should be
- Q2`
- Q2 + Q1
- (Q1 $\oplus$Q2)`
- Q1 $\oplus$Q2
How many addresses are required for 50 × 20 video RAM?
- 1020
- 1920
- 100
- 1000
Let the clock cycles required for various operations be as follows:
Register to/from memory transfer: 3 clock cycles
Add with both operand in register: 1 clock cycle
Instruction fetch and decode: 2 clock cycles per word
The total number of clock cycles required to execute the program, is
- 29
- 24
- 23
- 20
The switching expression corresponding to
f(A, B, C, D)= $\sum(1,4,5,9,11,12)$ is
- BC' D' + A'C'D + AB'D
- ABC' + ACD + B'C'D
- ACD' + A' BC' + AC'D'
- A'BD + ACD' + BCD'
Which of the following is the 2's complement of the number 10101?
- 01010
- 10101
- 01011
- None of these
Which of the following can be used to conveniently test odd parity of the word?
- XOR gate
- NOR gate
- OR gate
- None of these
By which of the following electronic components, is EPROM made up?
- Diodes
- MOSFETs
- Bipolar transistors
- None of these
Which of the following is true about a simple flip flop?
- It is a 1-bit memory latch.
- It is a 2-bit memory latch.
- It is not a memory element.
- None of these
Which of the following is true about the semiconductor memory?
- Somewhat slower than magnetic core memory
- Somewhat larger than the magnetic core memory
- Both 1 and 2
- A volatile memory
Which of the following is the basic purpose of using FETs in case of linear ICs?
- These provide large resistances.
- These increase input resistance.
- These decrease input resistance.
- Both (1) and (2)
Consider the following circuit.

The flip-flops are positive edge triggered D FFs. Each state is designated as a two bit string Q0Q1. Let the initial state be 00. The state transition sequence is:
- ![Option][1]
[1]: http://i.imgur.com/f917EZ6.png - ![be][1]
[1]: http://i.imgur.com/ZQzJDKd.png - ![c][1]
[1]: http://i.imgur.com/tXTzbME.png - ![d][1]
[1]: http://i.imgur.com/6xVwrXk.png
A dynamic RAM call, which holds 5V, has to be refreshed every 20 m/sec such that stored voltage does not fall below 0.5V. If the call has a constant discharge current of 0.1 pA, the storage capacitance of the call is
- 4 × 10-6
- 4 × 10-9
- 4 × 10-12
- 4 × 10-15
Consider the following set of instruction:
MVI A, BYTE1
RLC
MOV B, A
RLC
RLC
ADD B
If BYTE1 = 07H, then content of A, after the execution of program, will be
- 46H
- 70H
- 38H
- 68H
The range of integers that can be represented by an n bit 2's complement number system, is
- -2n - 1 to (2n -1 - 1)
- -(2n -1)to (2n -1 - 1)
- -2n - 1 to 2n -1
- -(2n +1)to (2n -1 - 1)


