A low memory can be connected to 8085 by using READY signal. If READY is set then communication is possible.

Cache is the small memory which has a very less access time. So it is used for temporal locality of reference whereas virtual memory is for spatial locality of reference.

A CPU needs software interrupt to obtain system services which need execution of privileged instructions.

Stack pointer register holds the address of top of stack, which is the location of memory at which the CPU should resume its execution after servicing some interrupt or subroutine call. So if SP register not available then no subroutine call instructions are possible.

A software interrupt is initiated by some program module which needs some CPU services, at that time the two modes can be interchanged.

A device can request interrupt service. A timer when finishes or power failure causes a running process to stop. But a scheduler process doesn't do this.

Device driver is the program which co-ordinates with CPU to regulate the devices. Register, cache & main memory are directly connected to CPU. So only Disk from given options require device drivers.

Load addresses are assigned to various parts of the program, the program can be loaded at any location in memory. This location is added to all addresses in the code, to get correct references. This makes a code re-locatable.

INTR is a signal which if enabled then microprocessor has interrupt enabled it receives high INR signal & activates INTA signal, so another request can't be accepted till CPU is busy in servicing interrupt.

Program counter is the register which has the next location of the program to be executed next. JMP & CALL changes the value of PC. PCHL instruction copies content of registers H & L to PC. ADD instruction after completion increments program counter. So program counter is modified in all cases.

Indexed addressing is used for array implementation where each element has indexes. Base register is used to re-locatable code, where starts from base address & then all local addresses as added to base address. Indirect addressing is done when array is passed as parameter only name is passed.

In absolute addressing mode, no need of giving operand, the operand are implicit, instruction itself has knowledge of operands.

In serial data transmission the sender & receiver needs to be synchronized with each other. Receiver should know when 1 byte of data has been sent. 0 & 1's which are padded tell the receiver to synchronize.

Instruction register stores instruction, look-a-side buffer & instruction cache are also memory. But instruction opcodes are the opcodes related to an instruction which are not part of memory hierarchy.

In horizontal microprogramming the instruction size is not large, & no decoding is required. But 1 bit is used for all control signals.

Activation record is the contiguous memory locations where the data needed by the program is kept so at most one activation record exist between current activation record & the record for the main.

Pipelining is a method to execute a program breaking it in several independent sequence of stages. In that case pipeline stages can't have different delays, no dependency among consecutive instructions & sharing of hardware resources shouldn't be there. So option (4) is true

Program relocation at run time transfers complete block to some memory locations. This require as base address and block should be relatively addressed through this base address. This require both based addressing and relative addressing mode.