Digital Systems and Microprocessors

Casual Mode - Take your time!

1 / 5
✓
Correct
0
✗
Incorrect
0
★
Score
0%
Multiple Choice

In which memory design, the communication between CPU and cache is through a separate bus, and is isolated from the main system bus?

  1. Look through design
  2. Look aside design
  3. Write through
  4. Write back
  5. Write once
Change Mode