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Computer Architecture (Information Technology)

Description: Test is on Computer Architecture
Number of Questions: 15
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Tags: Computers Information Technology Computer Architect
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In which of the following tasks performed by CPU must instructions be decoded to determine the required action?

  1. Fetch instructions

  2. Fetch data

  3. Process data

  4. Interpret instructions

  5. Write data


Correct Option: D
Explanation:

In this task performed by CPU, the instructions must be decoded to determine the required action.

The ____________ flag sets Program Status Word if an operation results in carry into or borrow out of the high-order bit.

  1. sign

  2. zero

  3. equal

  4. carry

  5. overflow


Correct Option: D
Explanation:

This flag sets the Program Status Word if an operation results in carry into or borrow out of the high-order bit.

The ___________ flag bit, supported by 8085 CPU, is set when the result of an ALU operation results in even parity.

  1. Z

  2. P

  3. CY

  4. S

  5. AC


Correct Option: B
Explanation:

This flag bit, supported by 8085 CPU, is set when the result of an ALU operation results in even parity.

In which of the following computer architectures are load and store the only operations that interact with memory?

  1. The stack machine

  2. The accumulator machine

  3. The load/store machine

  4. Flags

  5. MBR


Correct Option: C
Explanation:

In this computer architecture, the only operations that interact with memory are load and store.

Which of the following operations is performed in the instruction cycle where address translation is performed first and then fetching of operands from memory takes place?

  1. Write

  2. Fetch

  3. Decode

  4. Exit

  5. Halt


Correct Option: C
Explanation:

This is the operation performed in the instruction cycle where address translation is performed first and then fetching of operands from memory takes place.

______________ memory enables one to make a comparison of desired bit locations within a word for a specified match and to do this for all words simultaneously.

  1. Sequential

  2. Direct

  3. Random

  4. Associative

  5. Indirect


Correct Option: D
Explanation:

This type of memory access consists of a random-access type of memory that enables one to make a comparison of desired bit locations within a word for a specified match and to do this for all words simultaneously.

Which of the following data types, supported by IBM 370, may be either unsigned or signed and if signed, then it is stored in 2's compliment form?

  1. Floating point

  2. Decimal

  3. Binary

  4. Binary logical

  5. Character


Correct Option: C
Explanation:

This data type, supported by IBM 370, may be either unsigned or signed and if signed, then it is stored in 2's compliment form.

Which of the following I/O commands is addressed by the CPU to activate a peripheral device?

  1. Test command

  2. Control command

  3. Read command

  4. Write command

  5. CLS command


Correct Option: B
Explanation:

This I/O command is used to activate a peripheral device.

Which of the following activities is involved in CPU communication with I/O device, where the I/O module accepts commands from the CPU?

  1. Data

  2. Status reporting

  3. Address recognition

  4. Command decoding

  5. Data buffering


Correct Option: D
Explanation:

This is the activity involved in CPU communication with I/O device, where the I/O module accepts commands from the CPU.

In which of the following modes does the DMA controller perform DMA transfers at the fastest possible rate as long as the I/O device asserts its DMA request?

  1. Demand transfer mode

  2. Block transfer mode

  3. Single transfer mode

  4. Flyby DMA transfer

  5. Fetch-and-deposit DMA transfer


Correct Option: A
Explanation:

In this transfer mode, the DMA controller performs DMA transfers at the fastest possible rate as long as the I/O device asserts its DMA request.

Which of the following disk performance parameters indicates the time required to rotate the disk to get the wanted sector beneath the head?

  1. Seek time

  2. Rotational delay

  3. Transfer time

  4. Access time

  5. RAID


Correct Option: B
Explanation:

This is the disk performance parameter which indicates the time required to rotate the disk to get the wanted sector beneath the head.

In which of the following types of DMA configuration is the concept of integrated DMA to connect I/O modules to DMA controller using I/O bus?

  1. Single Bus Integrated DMA

  2. DMA using an I/O bus

  3. Single Bus Detached DMA

  4. Interrupts

  5. Program-controlled I/O


Correct Option: B
Explanation:

In this type of DMA configuration, the concept of integrated DMA is to connect I/O modules to DMA controller using I/O bus.

In which of the following modes of data transfer does the processor write a unit of data to memory?

  1. Memory to CPU

  2. CPU to Memory

  3. I/O to CPU

  4. CPU to I/O

  5. I/O to or from Memory


Correct Option: B
Explanation:

In this mode of data transfer, the processor writes a unit of data to memory.

________________ is the state in instruction cycle that analyses the instruction to determine the type of operation to be performed and operands to be used.

  1. Instruction Address Calculation

  2. Instruction Fetch

  3. Operand Address Calculation

  4. Instruction Operation Decoding

  5. Operand Fetch


Correct Option: D
Explanation:

This is the state in instruction cycle that analyses the instruction to determine the type of operation to be performed and operands to be used.

Which of the following is a 16-bit register of CPU that points to the current location of the memory where the instructions are to be written?

  1. Stack pointer

  2. Program counter

  3. MAR

  4. MDR

  5. IR


Correct Option: B
Explanation:

This is a 16-bit register of CPU that points to the current location of the memory where the instructions are to be written.

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