Advanced Computer Architecture
Advanced Computer Architecture concepts covering cache memory, pipelining, parallelism, instruction sets, vector processing, multi-threading, and I/O interfaces
Questions
Which of the following terms is used in cache organisation when the addressed data or instruction is found in the cache during operation?
- Cache Miss
- Cache Hit
- Cache Struck
- Cache Read
- Cache Write
Which of the following term refers to the translation of main memory address to the cache memory address?
- Physical address mode
- Virtual address mode
- Mapping
- Unified cache
- Hit ratio
Which of the following level of parallelism is also called fine-grained parallelism?
- Parallelism at the loop level.
- Parallelism at the procedure level.
- Parallelism at the instruction level.
- Parallelism at the program level.
- Parallelism at the exit level.
Which of the following strong consistency models is the one in which if the processes are executed in sequence, then the results are similar to the read write operations?
- Sequential consistency
- Strict consistency
- Casual consistency
- FIFO consistency
- Stack consistency
Which of the following addressing modes in 80X86 is the one in which an effective address is the contents of the base register?
- Absolute address
- Indexed Absolute Address
- Scaled Address
- Register Indirect Address
- Base Plus Index Plus Offset
Which of the following operations in pipeline instruction processing is performed first?
- Calculate operand address
- Fetch instruction
- Decode instruction
- Execute instruction
- Fetch operand
Which of the following instruction sets in Instruction Set Architecture (ISA) consists of a variety of expert instructions and may just not be used in practical programs?
- RISC(Reduced Instruction Set Computer)
- CISC(Complex Instruction Set Computer)
- VLIM(Very Long Instruction Word)
- Multithreading
- Multitasking
Which of the following registers of the vector register processor are linked to the functional units with the help of a pair of crossbars?
- Vector register
- Scalar register
- Vector functional units
- Vector load and store unit
- Control unit
Which of the following type of vector instruction is an operation that fetches the non-zero elements of a sparse vector from memory?
- Vector-Scalar instructions
- Vector-Vector instructions
- Gather and Scatter instructions
- Vector-Memory instructions
- Masking instructions
Which of the following technique is the one by which the execution of multiple instructions can be overlapped?
- Hazards
- Freeze
- Pipelining
- Forwarding
- FIFO
Which of the following hazards occur when an instruction depends on the result of a previous instruction in a way that is exposed by the overlapping of instructions in the pipeline?
- Structural hazards
- Control hazards
- Data hazards
- Cache miss
- Resource conflict
Which of the following parallelism refers to the way threads can communicate with other threads residing in other processors?
- Background processing
- Communication parallelism
- Computation parallelism
- Thread granularity
- Thread switch
Which of the following principles of multi-threading verifies the number of occurrences of thread switching?
- Communication latency
- The number of active threads
- Thread switch
- The numbers of remote reads in each thread
- Scalability
Which of the following interfaces in computer architecture gives a method for transferring information between internal memory and I/O devices?
- Bus interface
- Input-Output interface
- Response time
- Throughput
- RAID
Which of the following terms in computer architecture is used in each computer having its own particular instruction code format?
- Decoding
- Fields
- Instruction set
- Cell
- Operation