Questions
Where are micro programmes stored?
- Main memory
- Secondary memory
- Cache memory
- Read only storage memory
- None of the above
Micro programmes are executed to execute_____________
- user programme in the main memory
- instruction (OPCODE) in processor
- instruction (OPRAND) in processor
- program in the main memory
- none of the above
Micro programmes generate the sequence of ___________________.
- instructions
- digital signals
- data
- address
- none of the above
To access data/address bus, tristate buffers are used ________________
- to isolate the devices
- to share devices simultaneously
- to provide pipelining to the bus
- none of these
- all of the above
RISC architecture has processing speed ________________.
- faster than CISC
- same as CISC
- slower than CISC
- cannot compare the two technologies
- none of the above
RISC architecture became popular after the invention of _____________________.
- VLSI technology
- Micro programme technology
- Pipelining technology
- MSI technology
- None of the above
Cycle stealing is performed by DMA to__________________.
- hold CPU
- instruct CPU
- stop CPU
- perform without affecting CPU
- none of the above
Cycle stealing is performed when CPU is
- accessing memory
- writing in memory
- in execution cycle
- waiting for I/O to complete
- none of the above
Why I/O terminals in a system are normally latched while address terminals are not?
- I/O needs to hold the output status even after the clock address does not.
- Address needs to hold status after the clock I/O does not.
- I/O terminals are not latched.
- Address terminals are latched.
- None of the above
What is the difference between DMA and co-processor?
- No difference
- DMA does not execute instructions while co-processor does.
- Co-processor does not access memory while DMA does.
- CPU can continue working while both DMA and co-processor are working.
- None of the above
Multiprogram concept differs from multitasking in ____________________
- all the programmes, which are executed simultaneously one by one in multitasking. Only one programme will be executed till an idle condition occurs in multiprogramming.
- all the programmes, which are executed simultaneously one by one in multiprogramming. Only one programme will be executed till an idle condition occurs in multitasking.
- both the concepts that can handle batch processing
- both are the same
- none of the above
Human body is an ideal example of
- multitasking
- multiprogramming
- distributed processing
- pipelining
- none of the above
The architecture most suitable for cache memory implementation is
- 8080
- 8085
- 80486
- bit slice
- none of the above
Cache memories are made of _____________
- MOS Device
- TTL Device
- ECL Device
- C-MOS Device
- None of the above
Architecture of microprocessor differs from microcontroller since
- 8255 is not used by microcontroller, but microprocessor uses it
- extended RAM & ROM memory are not used in microcontroller but used in microprocessor
- RISC can be implemented in microprocessor, but not in microcontroller
- microprocessor has internal flash memory, but microcontroller does not
- none of the above
Main memory gets tristate nature when tristate buffers are connected to the device
- both at input and output
- only at input
- only at output
- only at address port
- none of the above
Main memory is constructed using
- MOS
- TTL
- ECL
- JFET
- none of the above
Loader is used by operating system at _____ of a program.
- compile time
- code optimization time
- execution time
- text editing time
- none of the above
I/O controllers are
- intelligent but dedicated processors
- to control CPU for I/O
- super computers
- dumb devices
- none of the above
Linker is provided to link______________
- local symbols/ functions
- global symbols/functions
- library functions only
- for execution of the program
- none of the above
Which language can be picked for writing a compiler?
- Assembly
- FORTRAN
- C
- JAVA
- None of the above
Buffer blocks are provided to I/O controllers to handle I/O and to
- save CPU time
- provide multitasking to I/O
- engage CPU till I/O is complete
- interrupt CPU by I/O devices
- none of the above