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Computer Architecture

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Number of Questions: 30
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In which of the following does each operand datum is two words long, with the low order word followed by the high order word in 8086 processor?

  1. DB

  2. Records Directives

  3. DD

  4. IORC

  5. HLT


Correct Option: C
Explanation:

Here, each operand datum is two words long with the low order word followed by the order word in 8086 processor.

In which of the following logic gates, the output is high only when any one of the inputs were high and output is low if both inputs are at the same logic?

  1. NAND Gate

  2. AND Gate

  3. NOR Gate

  4. Ex-OR Gate

  5. Step Recovery


Correct Option: D
Explanation:

The output is high only when any one of the inputs were high and output is low if both inputs are at the same logic.

Which of the following consists of continually examining the status of an interface and performing an input/output operation with the interface in 8086 proessor?

  1. Interrupt Priority Management

  2. Polling

  3. Programmed I/O

  4. Interrupt I/O

  5. Status Field


Correct Option: C
Explanation:

It consists of continually examining the status of an interface and performing an input/output with the interface in 8086 processor.

Which of the following logic circuits requires two Ex-OR gate for sum generation and two AND gates, one Ex-OR gate and one OR gate for the carry generation?

  1. Full Adder

  2. Half Adder

  3. Half Subtractor

  4. NAND Logic

  5. Resolution


Correct Option: A
Explanation:

It requires two Ex-OR gate for sum generation and two AND gates, one Ex-OR gate and one OR gate for the carry generation.

Which of the following registers is used to store 8 bit data and to perform arithmetic and logic operations in 8085 processor?

  1. Instruction Register

  2. Control Generator

  3. Memory Address Register

  4. Register Selector

  5. Accumulator


Correct Option: E
Explanation:

This register is used to store 8 bit data and to perform arithmetic and logical operations in 8085 processor.

Which of the following appears in a machine cycle to advise the external circuitry that the AD0 - AD7 lines contain the lower 8 bits of a memory address in 8085 processor?

  1. Address Lines

  2. Address Latch Enable

  3. Status Lines

  4. Trap

  5. Data Line


Correct Option: B
Explanation:

This signal appears in a machine cycle to advise the external circuitry that the AD0 -AD7 lines contain the lower 8 bits of a memory address in 8085 processor.

In which of the following logics, the output is high only when all inputs are high at the same time?

  1. AND Gate

  2. NAND Gate

  3. NOR Gate

  4. Ex-OR Logic

  5. Conversion Rate


Correct Option: A
Explanation:

Here, the output is high only when all inputs are high at the same time

Which of the following has a typically fast update period but a disproportionately slow step recovery?

  1. Tracking Converter

  2. Conversion Rate

  3. Resolution

  4. ADC

  5. DAC


Correct Option: A
Explanation:

It has a typically fast update period but a disproportionately slow step recovery.

Which of the following logic circuits is to detect the the presence of a specified combination of bits on its inputs and to indicate that presence by a specified output level?

  1. Encoder

  2. Decoder

  3. Half Subtractor

  4. Multiplexer

  5. NAND Gate


Correct Option: B
Explanation:

This logic circuit is to detect the presence of a specified combination of bits on its inputs and to indicate that presence by a specified output level.

Which of the following lines indicates that in which direction the 8085 microprocessor exepects to pass data between itself and the external data bus?

  1. Ready

  2. Status Lines

  3. Read And Write

  4. Address Lines

  5. Trap


Correct Option: C
Explanation:

These lines indicate which direction the 8085 microprocessor expects to pass data between itself and the external data bus.

Which of the following flags is set if a result is out of range in 8086 processor?

  1. Sign Flag

  2. Zero Flag

  3. Overflow Flag

  4. Carry Flag

  5. Direct Addressing Mode


Correct Option: C
Explanation:

This flag is set if a result is out of range in 8086 processor.

In which of the following logics, the output is high any time at least one of its inputs is high?

  1. NAND Gate

  2. NOR Gate

  3. OR Gate

  4. AND Gate

  5. Step Recovery


Correct Option: C
Explanation:

The output is high any time at least one of its inputs is high.

Which of the following logic circuits add two 4 bit BCD code groups, using straight binary addition?

  1. Half Adder

  2. Half Subtractor

  3. AND Gate

  4. BCD Adder

  5. Step Recovery


Correct Option: D
Explanation:

This logic circuit adds two 4-bit BCD code groups, using straight binary addition.

Which of the following may be used in I/O operations with serial devices, or anyplace that error checking is to be done in 8085 processor?

  1. Carry Flag

  2. Zero Flag

  3. Parity Flag

  4. Trap

  5. Sign Flag


Correct Option: C
Explanation:

This may be useful in I/O operations with serial devices, or anyplace that error checking is to be done in 8085 processor.

Which is an unmaskable interrupt with a fixed vector in 8085 processor?

  1. Trap

  2. RST 5.5, 6.5, 7.5

  3. INTR & INTA

  4. Ready

  5. Status Lines


Correct Option: A
Explanation:

This is an unmaskable interrupt with a fixed vector in 8085 processor.

In which of the following circuits, the output voltage is the inverted sum of all the input voltage?

  1. R-2R Ladder DAC

  2. Single Slope Integrating ADC

  3. Conversion Rate

  4. Nyquist Frequency

  5. Binary Weighted Input DAC


Correct Option: E
Explanation:

Here, the output voltage is the inverted sum of all the input voltage.

In which of the following, each operand datum occupies one word, with its low order part being in the first byte and its high order part being in the second byte in 8086 processor?

  1. DB

  2. DW

  3. Instruction

  4. NOP

  5. Operand


Correct Option: B
Explanation:

Here, each operand datum occupies one word, with its low order part being in the first byte and its high order part being in the second byte in 8086 processor.

In which of the following logics, the output is ON only when both the inputs are ON or OFF?

  1. Ex-NOR Logic

  2. AND Logic

  3. NAND Logic

  4. NOR Logic

  5. Sample Frequency


Correct Option: A
Explanation:

Here, the output is ON only when both the inputs are ON or OFF.

Which of the following instruction causes the computer to cease its operations in 8086 processor?

  1. NOP

  2. HLT

  3. DB

  4. Records

  5. RCL


Correct Option: B
Explanation:

It causes the computer to cease its operations in 8086 processor.

Which of the following circuits takes data from the one input line and distributes it to output lines?

  1. Demultiplexer

  2. Multiplexer

  3. Encoder

  4. Half Subtractor

  5. NAND Gate


Correct Option: A
Explanation:

It takes data from the one input line and distributes it to output lines.

In which of the following addressing modes, the register pair contains the high order byte of the address in the first and the low order byte of the address in the second in 8085 processor?

  1. Direct Branch Addressing Mode

  2. Register Indirect Branch Addressing Mode

  3. Register Addressing Mode

  4. Zero Flag

  5. Stack Pointer


Correct Option: B
Explanation:

Here, the register pair contains the high order byte of the address in the first and the low order byte of the address in the second in 8085 processor.

In which of the following, the counter will receive a low signal on the active low LOAD input, causing it to reset to 00000000 on the next clock pulse?

  1. Single-Slope Integrating ADC

  2. R-2R Ladder DAC

  3. Nyquist Frequency

  4. Digital Ramp ADC

  5. Resolution


Correct Option: D
Explanation:

Here, the counter will receive a low signal on the active low LOAD input, causing it to reset to 00000000 on the next clock pulse.

Which of the following provides connections for an external frequency determining circuit to feed the 8085's clock?

  1. CLOCK

  2. TRAP

  3. X1 And X2

  4. INTR And INTA

  5. Sign Flag


Correct Option: C
Explanation:

These provide connection for an external frequency determining circuit to feed the 8085's clock.

The calibration drift dilemma problem is solved and the solution is found in a design variation called

  1. Single-Slope Integrating ADC

  2. Aliasing

  3. Dual Slope Converter

  4. Step Recovery

  5. Conversion Rate


Correct Option: C
Explanation:

The calibration drift delimma problem is solved and the solution is found in a design variation called the dual slope converter.

In which of the following modes, the instruction indirectly specifies the address of the data by referring to a register pair for the absolute address in 8085 processor?

  1. Register Indirect Addressing Mode

  2. Intersegment Indirect Addressing Mode

  3. Intrasegment Indirect Addressing Mode

  4. Register Addressing Mode

  5. Direct Branch Addressing Mode


Correct Option: A
Explanation:

Here, the instruction indirectly specifies the address of the data by referring to a register pair for the absolute address in 8085 processor.

In which of the following circuits, the register monitors the comprator's output to see if the binary count is less than or greater than the analog signal input, adjusting the bit values accordingly?

  1. Resolution

  2. Nyquist Frequency

  3. R-2R Ladder DAC

  4. Single-Slope Integrating ADC

  5. Successive Approximation ADC


Correct Option: E
Explanation:

Here, the register monitors the comprator's output to see if the binary count is less than or greater than the analog signal input, adjusting the bit values accordingly.

In which of the following circuits, the data pattern contained within the shift register will recirculate as long as clock pulses are applied?

  1. Johnson Counter

  2. Ring Counter

  3. Shift Registers

  4. Serial In, Serial Out Shift Register

  5. Resolution


Correct Option: B
Explanation:

Here, the data pattern contained within the shift register will recirculate as long as clock pulses are applied.

Which of the following flags is set to a 1 by the instruction just ending if a carry occurred from 4th bit i.e 0, 1, 2 and 3rd bit of the A register during the instruction's execution in 8085 processor?

  1. Carry Flag

  2. Zero Flag

  3. Auxiliary Carry Flag

  4. Sign Flag

  5. Clock


Correct Option: C
Explanation:

This flag is set to a 1 by the instruction just ending if a carry occurred from  4th bit i.e 0, 1, 2, 3rd bit of the A register during the instruction's execution in 8085 processor.

In which of the following ADCs, the series of comprators, each one compares the input signal with a unique reference voltage?

  1. Single-Slope Integrating ADC

  2. R-2R Ladder DAC

  3. Flash Type ADC

  4. Resolution

  5. Sample Frequency


Correct Option: C
Explanation:

Here, the series of comparators, each one compares the input signal with a unique reference voltage.

Which of the following flags is used by string manipulation instructions in 8086 processor?

  1. Sign Flag

  2. Zero Flag

  3. Direction Flag

  4. Carry Flag

  5. Direct Addressing Mode


Correct Option: C
Explanation:

This flag is used by the string manipulation instructions in 8086 processor.

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