In a paging system with TLB it is observed that for every 10 memory accesses, 9 accesses are successfully found in TLB. Find out effective access time, if memory access is 200 ms and cache access is 10 ms while finding page base address.

Keep practicing — related questions

• A paging system is employing HW cache as TLB of 20 ns access time (search time) and physical memory access ...
• Consider a system with a two-level paging scheme in which a regular memory access takes 150 nanoseconds, an...
• Hit ratio to a TLB is 75%. It takes 25 nanoseconds to search TLB and 200 nanoseconds to access the main mem...
• Let the page fault service time be 10ms in a computer with average memory access time being 20ns. If one pa...
• In demand paging, if average page fault service time is 7 millisecond, memory access time is 150 nanosecond...
• A processor uses 2-level page tables for virtual to physical address translation. Page tables for both leve...
• A processor uses 2-level page tables for virtual to physical address translation. Page tables for both leve...
• A CPU generates 32-bit virtual addresses. The page size is 4 KB. The processor has a translation look-aside...